Electronic Design Automation: Achieving First Pass Design Success with the Ultimate Tools and Right Approach

Key takeaways:

• Electronic design automation (EDA) tools can dramatically improve design effort, cost, and time to market.
• Artificial intelligence (AI) and machine learning (ML) are set to further boost EDA’s productivity.
• The shift left paradigm is at the heart of EDA because errors in printed circuit boards (PCBs) and integrated circuits (ICs) can be prohibitively expensive to correct and should be fixed as early as possible.

ICs are increasing in complexity each year. Components that occupied an entire PCB in the past are now crammed into a tiny system-on-chip. In addition, PCBs are becoming more complex to implement advances in aerospace/defense, 5G/6G, and other industries. Electronic Design Automation (EDA) helps you manage these complexities.

In this article, find out how modern EDA streamlines the design of PCBs and ICs. We explain how EDA improves each step of the design workflow and outline the benefits that customers are seeing.

What is electronic design automation?

Electronic design automation is an engineering approach that extensively uses software tools with automated algorithms to improve the designs of electronic PCBs, semiconductor ICs, and hybrid systems. EDA for hybrid systems supports the co-design of electronic systems with other fields like mechanical engineering and software development.

EDA is an evolution in electronic computer-aided design (ECAD) with a focus on automation and modern technologies. It uses advances in AI, machine learning, and high-performance computing to boost design productivity and reduce the time to market.

How does EDA facilitate printed circuit board (PCB) design and manufacturing?

EDA seeks to streamline every stage of the PCB design process while keeping an eye on design decisions that impact later stages — like fabrication/yield, manufacturability, and operational lifetime.

Some of these aspects are crucial in mission-critical industries like aerospace/defense, automotive, and cellular. Devices in these industries have to operate properly for years or decades, sometimes in hostile environments. Good EDA tools must cater to all these industries.

Moreover, PCB design is not a linear sequential process. It’s more of an iterative back-and-forth between different specialist teams until everyone agrees on the design’s correctness. Good EDA tools must be aware of this and provide workflows that facilitate it.

What are some key features of EDA tools for PCBs?

Let’s review some modern EDA capabilities that facilitate fast but thorough PCB design. We can group the features into schematic design, schematic simulation, physical design, multi-physics simulation and analysis, verification, and fabrication.

Schematic design features

The schematic design consists of all the two-dimensional electrical circuits that together implement the project’s requirements. Essential features include:

• Schematic editor: Users must be able to efficiently search for suitable passive and active components and chips and then connect them. Important usability features include automatic labeling, highlighting of individual nets, quick zooming and panning, and automatically moving groups of components for neater layouts.
• Schematic management: EDA tools enable complex projects to be split into multiple schematics and manage their interdependencies. This enables different teams to work on them simultaneously.
• Component selection: Good EDA tools facilitate component selection based on real-time availability and prices, supplier allowlists and blocklists, and business-level policies.

Schematic simulations

Many issues can be detected early by running simulations against the schematics. Fixing them at this stage takes far less time and cost. Common simulations include:

• alternating and direct current voltage supplies, sweeps, and transients
• S-parameter extraction and noise analyses for radio frequency (RF) components
• supplying different frequency-domain waveforms

Advanced nonlinear simulations using neural networks and other ML models are also available in modern EDA tools.

Physical design capabilities

Once a draft schematic is ready, layout engineers begin translating it into a physical PCB layout. This process includes:

• multi-layer PCB design
• component placement
• placement of vias and high-density interconnects
• autorouting
• high-speed digital design
• differential pairs design

If schematic issues are found, it’s sent back for improvements until the layout is satisfactory. This iterative back-and-forth ensures that all teams are happy with the correctness of the design. EDA tools handle all this systematically by automatically opening issues, assigning correction tasks, and notifying the correct teams.

Physical simulations and analyses

Certain phenomena can only be simulated against a physical layout. They include:

• electromagnetic interference (EMI) and electromagnetic compatibility (EMC)
• electro-thermal simulations
• power integrity and signal integrity simulations

A common analysis step is parasitic extraction. EDA tools analyze the layout and compute parasitic elements based on the geometric and material properties of the traces, vias, and other elements.

After parasitic analysis, a full circuit simulation can be performed.

Verification features

These include:

• Electrical rule checks (ERC): ERC rules verify the functional correctness of a design by checking electrical aspects based on the schematic. For example, they check for unconnected pins or nets and different conflicts.
• Design rule checks (DRC): DRC rules verify physical layout constraints like spacing and sizing. They ensure manufacturability and avoid possible fabrication errors.
• Layout versus schematic (LVS) analysis: LVS analysis ensures that the physical layout matches the intended schematic design.

Fabrication features

After a design is fully verified, the final step is to generate Gerber files that are sent to a PCB manufacturer.

What are the benefits of EDA for circuit board design?

Below are some key benefits of PCB design automation:

• Drastic reduction in end-to-end design time: According to the Fall 2024 issue of Shift Left: The EDA Journal, automation can reduce the end-to-end design of a typical smartphone PCB from two weeks of manual work to just two days. Checking all RF paths can be reduced from 100+ hours to about 12 hours. Such order-of-magnitude reductions in the time-to-market are major advantages in highly competitive markets like consumer devices.
• Faster setup time: The circuit design workflow involves many complex intermediate stages like LVS checks, schematic-based simulations, RF and EMC verification, thermal simulation, and more. Circuit and test data must be imported and configured before each stage. By automating these tasks, EDA tools have reduced the time taken by a factor of 4-12. For example, the same Shift Left Journal article from above reported that RF verification setup time was reduced from 60 minutes to just five minutes.
• Fast and accurate bill of materials (BOM) generation: While manual BOM generation can take 20+ minutes, automated workflows generate them within a few seconds.
• Automated constraint configuration: Constraint rules can be automatically imported from organization-wide repositories based on the nature of the design task. This reduces the chances of inconsistencies between teams.
• Reduced organizational costs: EDA reduces costs in all areas. Mundane tasks require less manual engineering effort, freeing engineers to focus on complex tasks.
• Optimized fabrication costs: Placement, layout, and routing optimizations reduce the required quantity of substrate fiberglass, copper, and solder. This also means better sustainability and reduced emissions.
• Streamlined teamwork: EDA helps streamline organizational aspects. It enables diverse teams to simultaneously work on different subsystems without stepping on each other’s toes. This is made possible by centralized design data storage and optimized data synchronization.
• Careful component selection: Component selection automation based on supply chain policies and blocklists can help avoid many design, maintenance, and business problems. For example, due to trade wars, import regulations, or national security concerns, sourcing components from certain countries or suppliers may be prohibited or discouraged. Management can’t expect engineers to have such knowledge. Instead, automated component selection is the ideal approach for enforcing such business-level policies.

Let’s now shift our focus from PCBs to ICs.

How do EDA tools assist in the design and verification of ICs?

EDA features for chip design are very different from PCBs. Unlike PCBs, there are only a handful of foundries around the world that can manufacture ICs. Each fab imposes strict constraints on IC designs. To make this process systematic, each fab publishes a process development kit (PDK) that specifies the standard building blocks supported by that fab’s process node, design rule checks, sizing specifications, and more.

Also, the design workflows for digital chips, analog chips, and mixed-signal chips are different. In analog ICs, those with RF capabilities (RFICs) or microwave capabilities (monolithic microwave ICs, or MMICs) have their own specializedfoundries and fabrication processes. EDA tools must cater to all these possibilities.

What are some key features of EDA tools for ICs?

Good EDA tools have the following features for IC design and verification.

Design data management features

All IC designs involve initial specification stages that require data management and traceability features:

• System specification: The designers identify the functionality, performance, power consumption, and physical constraints of the chip, size and packaging requirements, interface requirements, and communication protocols for the intended application. EDA’s design data management features are used to centrally store these specifications.
• Architecture specification: This phase decides how the functionality will be implemented. It involves high-level decisions on which processors, intellectual property (IP) cores, memory, and peripherals to use, identifying critical components, their interactions, and data flows. Various performance, power, and area scenarios and trade-offs are analyzed. These details are stored by EDA’s design data management subsystem. Good EDA tools support traceability between the decisions made here and later stages.

Digital IC design features

Figure 2 shows what the front-end design workflow for digital ICs looks like.

EDA tools must have these front-end design features for digital ICs:

• Functional design: Based on the architecture specification, EDA tools support their functional implementation as register-transfer level (RTL) abstractions. RTL describes the logic in terms of registers and operations on registers’ data. These RTL constructs are coded using hardware definition languages like Verilog. Code suggestions, references, and other assistive features in the EDA tools are important for error-free and productive coding.
• Functional simulation and verification: EDA tools provide simulators to test the RTL code under various scenarios. Test inputs and results should be stored by EDA tools for diagnosis and reuse. Good EDA tools support automated functional and regression testing to ensure correctness after every change.
• Logical synthesis of netlists: EDA tools generate netlists from the verified RTL. Netlists are a low-level format consisting of logic gates (like AND, OR, NOT, and NAND), flip-flops, input and output pins of each component, and interconnecting nets. The components can represent either standard cells or custom-designed components.
• Netlist simulation: EDA tools can test the netlists inside simulators to catch any errors that crept in during the synthesis.
• Formal verification: EDA tools can mathematically prove the correctness of a netlist against its specifications.

These steps are run repeatedly and iteratively to detect and fix as many errors as possible.

After front-end design, the back-end design phases convert the netlist into a physical layout that can be etched on a silicon wafer. Due to the high complexity of modern ICs, EDA tools heavily automate all these back-end design stages:

• Floor planning and placement: The gate-level netlist is converted to circuit components like standard cells. A standard cell is a pre-designed building block (from the foundry’s PDK) with transistors like fin field-effect transistors (FinFETs) arranged in a particular way to perform some logic function (like AND or NOT). Standard cells include interconnections like copper routes for signal, power, ground connections, and input/output pins for connecting to other cells or external circuitry.
• Routing: The interconnections between standard cells are set up during this step. Since routing is an error-prone critical function, EDA tools implement robust auto-routing algorithms and checks.
• Clock tree synthesis: EDA tools generate the hierarchical clock trees to ensure that all components operate synchronously when the clock signals reach them.
• Timing analysis: After building the clock tree, EDA tools conduct timing analysis to verify that all clocked elements meet their setup and hold time requirements.
• DRC: Automated DRC checks ensure that all the design rules of the foundry are followed. These can number in the thousands, making automation a necessity.
• Physical verification: Physical verification involves implementing the IC design as a field-programmable gate array to verify that it functions according to project specifications.
• Signoff and tape-out: Once the design is fully verified, EDA tools generate graphical design format (GDSII) files that can be handed over to the fab for lithography and other manufacturing steps.

Analog IC design features

For analog ICs, RFICs, and MMICs, the following features are important:

• Schematic creation: EDA software provides schematic creation tools.
• Schematic analysis: Feedback analysis, biasing, and stability analysis are conducted by EDA tools.
• Simulation and verification: Specialized simulation tools like SPICE are used to check the working of the schematic.
• Layout design: Once the circuit is verified, the physical layout of the circuit starts. This involves placing components and routing interconnections on the silicon die. Parasitic capacitance and resistances must be calculated and accounted for to prevent performance and signal integrity issues.
• Layout simulations: RF and EMC aspects are simulated for RFICs and MMICs to ensure regulatory compliance and transceiver performance.

What are some key benefits of IC design automation?

Semiconductor companies that are using the advanced analysis, simulation, and verification capabilities of modern EDA software report stunning improvements in technical and organizational aspects like:

• lower power consumption by systems-on-chips (SoCs) and application-specific ICs
• reduced power leakage from central processors and graphics chips
• optimized propagation of signals
• fewer design and engineering hours by an order of magnitude

The “shift left” paradigm of IC EDA emphasizes early problem detection to prevent expensive re-spins later.

Keysight EDA solutions

Keysight’s EDA solutions include the following software:

• Advanced Design System (ADS) for RF and high-speed digital PCBs, ICs, and multi-technology layout and assembly
• RFPro Circuit for RF simulations
• EMPro for EM simulations
• RFPro Circuit for advanced RFIC analyses and verification
• Thermal Design for electrothermal analysis of ICs
• Chiplet PHY Designer to model and analyze chiplets from D2D PHY to D2D PHY at a system level
• System Design for RF system design in 5G, 6G, automotive, and satellite domains
• IC-CAP Device Modeling for modeling semiconductor devices
• Keysight HUB and Keysight SOS for IC design data management

ADS offers 3D integration of multi-technology including chips, packaging, interconnects, shielding, boards, and input/output connectors. This represents the most realistic assembly of the product to be designed and simulated, unlike other tools that design chips, packaging, or boards separately but not together as the assembled product.

How does Python integration enhance Keysight EDA workflows?

The latest ADS 2025 release offers extensive application programming interfaces (APIs) to facilitate deeper integration and automation. These interfaces help designers, EDA integrators, and AI/ML engineers create novel task-specific integrated workflows.

The Python integration targets these use cases:

• Standalone applications: Build standalone programs with domain-specific user interfaces that combine ADS API calls with other platforms and frameworks for advanced data capture, modeling, automation, analyses, simulations, and visualizations.
• Multi-vendor workflows: Python APIs enable the import and export of data between tools, the translation of data between different formats, and pre-processing workflows to ready the design for fabrication.
• Test and verification workflows: They enable scalable verification to perform corner-case tests; collect statistics; and facilitate design-for-manufacturing (DFM), nightly integrations, regression testing, and sign-off for requirements flows.

What AI/ML capabilities are available in Keysight EDA solutions?

The following AI/ML features are available:

• Circuit simulators: Advanced nonlinear circuit models can be created by training artificial neural networks.
• Custom ML models: ADS’s Python support enables integration with AI frameworks like PyTorch to train and run custom EDA models.
• Training data management: Data from simulators and measurement systems, combined with formatting, tagging, and data reduction features from PathWave Data Tools, enable the creation of reliable training datasets for your custom EDA ML models.

Keysight’s vision for next-generation EDA

Keysight’s vision for next-generationEDA tools involves tackling increasing complexity and shorter time-to-market using software with these characteristics:

• Integrated workflows: Modern products require collaboration and co-design across multiple engineering disciplines and levels of complexity. So, system-level automated and integrated workflows will prevail over discrete tools for specific tasks.
• Advanced technologies: EDA tools will extensively use machine learning, generative AI, and high-performance computing to streamline each step of the design and manufacturing process.
• Digital twins: Digital twins that accurately model products, processes, and workflows will be used extensively to shift left. This way, the evaluation and optimization of designs can occur as early as possible in the engineering life cycle.